A Low-Power 1-GHz Razor FIR Accelerator With Time-Borrow Tracking Pipeline and Approximate Error Correction in 65-nm CMOS - researchr publication related

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Paul N. Whatmough, Shidhartha Das, David M. Bull. A Low-Power 1-GHz Razor FIR Accelerator With Time-Borrow Tracking Pipeline and Approximate Error Correction in 65-nm CMOS. J. Solid-State Circuits, 49(1):84-94, 2014. [doi]

The following publications are possibly variants of this publication:

A low-power 1GHz razor FIR accelerator with time-borrow tracking pipeline and approximate error correction in 65nm CMOSPaul N. Whatmough, Shidhartha Das, David M. Bull. isscc 2013: 428-429 [doi]

Razor: Circuit-Level Correction of Timing Errors for Low-Power OperationDan Ernst, Shidhartha Das, Seokwoo Lee, David Blaauw, Todd M. Austin, Trevor N. Mudge, Nam Sung Kim, Krisztián Flautner. micro, 24(6):10-20, 2004. [doi]

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