Paul N. Whatmough, Sae Kyu Lee, Marco Donato, Hsea-Ching Hsueh, Sam Likun Xi, Udit Gupta, Lillian Pentecost, Glenn G. Ko, David M. Brooks, Gu-Yeon Wei. 2 SoC with a 54.5x Flexibility-Efficiency Range from Dual-Core Arm Cortex-A53 to eFPGA and Cache-Coherent Accelerators. In 2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019. pages 34, IEEE, 2019. [doi]
@inproceedings{WhatmoughLDHXGP19,
title = {2 SoC with a 54.5x Flexibility-Efficiency Range from Dual-Core Arm Cortex-A53 to eFPGA and Cache-Coherent Accelerators},
author = {Paul N. Whatmough and Sae Kyu Lee and Marco Donato and Hsea-Ching Hsueh and Sam Likun Xi and Udit Gupta and Lillian Pentecost and Glenn G. Ko and David M. Brooks and Gu-Yeon Wei},
year = {2019},
doi = {10.23919/VLSIC.2019.8778002},
url = {https://doi.org/10.23919/VLSIC.2019.8778002},
researchr = {https://researchr.org/publication/WhatmoughLDHXGP19},
cites = {0},
citedby = {0},
pages = {34},
booktitle = {2019 Symposium on VLSI Circuits, Kyoto, Japan, June 9-14, 2019},
publisher = {IEEE},
isbn = {978-4-86348-720-8},
}