A fault tolerant, area efficient architecture for Shor s factoring algorithm

Mark Whitney, Nemanja Isailovic, Yatish Patel, John Kubiatowicz. A fault tolerant, area efficient architecture for Shor s factoring algorithm. In Stephen W. Keckler, Luiz André Barroso, editors, 36th International Symposium on Computer Architecture (ISCA 2009), June 20-24, 2009, Austin, TX, USA. pages 383-394, ACM, 2009. [doi]

Abstract

Abstract is missing.