Martin Wiessflecker, Günter Hofer, Gerald Holweg, Wolfgang Pribyl. An 11 bit SAR ADC combining a split capacitor array with a resistive ladder and a configurable noise time domain comparator. In 55th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2012, Boise, ID, USA, August 5-8, 2012. pages 101-104, IEEE, 2012. [doi]
@inproceedings{WiessfleckerHHP12,
title = {An 11 bit SAR ADC combining a split capacitor array with a resistive ladder and a configurable noise time domain comparator},
author = {Martin Wiessflecker and Günter Hofer and Gerald Holweg and Wolfgang Pribyl},
year = {2012},
doi = {10.1109/MWSCAS.2012.6291967},
url = {https://doi.org/10.1109/MWSCAS.2012.6291967},
researchr = {https://researchr.org/publication/WiessfleckerHHP12},
cites = {0},
citedby = {0},
pages = {101-104},
booktitle = {55th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2012, Boise, ID, USA, August 5-8, 2012},
publisher = {IEEE},
isbn = {978-1-4673-2526-4},
}