An 11 bit SAR ADC combining a split capacitor array with a resistive ladder and a configurable noise time domain comparator

Martin Wiessflecker, Günter Hofer, Gerald Holweg, Wolfgang Pribyl. An 11 bit SAR ADC combining a split capacitor array with a resistive ladder and a configurable noise time domain comparator. In 55th IEEE International Midwest Symposium on Circuits and Systems, MWSCAS 2012, Boise, ID, USA, August 5-8, 2012. pages 101-104, IEEE, 2012. [doi]

Abstract

Abstract is missing.