Sasindu Wijeratne, Rajgopal Kannan, Viktor K. Prasanna. Reconfigurable Low-latency Memory System for Sparse Matricized Tensor Times Khatri-Rao Product on FPGA. In 2021 IEEE High Performance Extreme Computing Conference, HPEC 2021, Waltham, MA, USA, September 20-24, 2021. pages 1-7, IEEE, 2021. [doi]
Abstract is missing.