Use of embedded scheduling to compile VHDL for effective parallel simulation

John Willis, Zhiyuan Li, Tsang-Puu Lin. Use of embedded scheduling to compile VHDL for effective parallel simulation. In Proceedings EURO-DAC 95, European Design Automation Conference with EURO-VHDL, Brighton, England, UK, September 18-22, 1995. pages 400-405, IEEE Computer Society, 1995. [doi]

@inproceedings{WillisLL95,
  title = {Use of embedded scheduling to compile VHDL for effective parallel simulation},
  author = {John Willis and Zhiyuan Li and Tsang-Puu Lin},
  year = {1995},
  doi = {10.1145/224270.224355},
  url = {http://doi.acm.org/10.1145/224270.224355},
  tags = {compiler},
  researchr = {https://researchr.org/publication/WillisLL95},
  cites = {0},
  citedby = {0},
  pages = {400-405},
  booktitle = {Proceedings EURO-DAC 95, European Design Automation Conference with EURO-VHDL, Brighton, England, UK, September 18-22, 1995},
  publisher = {IEEE Computer Society},
  isbn = {0-8186-7156-4},
}