Use of embedded scheduling to compile VHDL for effective parallel simulation

John Willis, Zhiyuan Li, Tsang-Puu Lin. Use of embedded scheduling to compile VHDL for effective parallel simulation. In Proceedings EURO-DAC 95, European Design Automation Conference with EURO-VHDL, Brighton, England, UK, September 18-22, 1995. pages 400-405, IEEE Computer Society, 1995. [doi]

Abstract

Abstract is missing.