Hugues Wouafo, Cyrille Chavet, Philippe Coussy, Robin Danilo. Efficient scalable hardware architecture for highly performant encoded neural networks. In 2017 IEEE International Workshop on Signal Processing Systems, SiPS 2017, Lorient, France, October 3-5, 2017. pages 1-6, IEEE, 2017. [doi]
@inproceedings{WouafoCCD17,
title = {Efficient scalable hardware architecture for highly performant encoded neural networks},
author = {Hugues Wouafo and Cyrille Chavet and Philippe Coussy and Robin Danilo},
year = {2017},
doi = {10.1109/SiPS.2017.8109986},
url = {https://doi.org/10.1109/SiPS.2017.8109986},
researchr = {https://researchr.org/publication/WouafoCCD17},
cites = {0},
citedby = {0},
pages = {1-6},
booktitle = {2017 IEEE International Workshop on Signal Processing Systems, SiPS 2017, Lorient, France, October 3-5, 2017},
publisher = {IEEE},
isbn = {978-1-5386-0446-5},
}