Efficient scalable hardware architecture for highly performant encoded neural networks

Hugues Wouafo, Cyrille Chavet, Philippe Coussy, Robin Danilo. Efficient scalable hardware architecture for highly performant encoded neural networks. In 2017 IEEE International Workshop on Signal Processing Systems, SiPS 2017, Lorient, France, October 3-5, 2017. pages 1-6, IEEE, 2017. [doi]

Abstract

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