A 28-nm Computing-in-Memory-Based Super-Resolution Accelerator Incorporating Macro-Level Pipeline and Texture/Algebraic Sparsity

Hao Wu, Yong Chen 0005, Yiyang Yuan, Jinshan Yue, Xiangqu Fu, Qirui Ren, Qing Luo, Pui-In Mak, Xinghua Wang, Feng Zhang 0014. A 28-nm Computing-in-Memory-Based Super-Resolution Accelerator Incorporating Macro-Level Pipeline and Texture/Algebraic Sparsity. IEEE Trans. Circuits Syst. I Regul. Pap., 71(2):689-702, February 2024. [doi]

Authors

Hao Wu

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Yong Chen 0005

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Yiyang Yuan

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Jinshan Yue

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Xiangqu Fu

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Qirui Ren

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Qing Luo

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Pui-In Mak

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Xinghua Wang

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Feng Zhang 0014

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