Chundong Wu, Wang Ling Goh, Chiang Liang Kok, Liter Siek, Yat-Hei Lam, Xi Zhu, Ravinder Pal Singh. Asymmetrical Dead-Time Control Driver for Buck Regulator. IEEE Trans. VLSI Syst., 24(12):3543-3547, 2016. [doi]
@article{WuGKSLZS16,
title = {Asymmetrical Dead-Time Control Driver for Buck Regulator},
author = {Chundong Wu and Wang Ling Goh and Chiang Liang Kok and Liter Siek and Yat-Hei Lam and Xi Zhu and Ravinder Pal Singh},
year = {2016},
doi = {10.1109/TVLSI.2016.2551321},
url = {http://dx.doi.org/10.1109/TVLSI.2016.2551321},
researchr = {https://researchr.org/publication/WuGKSLZS16},
cites = {0},
citedby = {0},
journal = {IEEE Trans. VLSI Syst.},
volume = {24},
number = {12},
pages = {3543-3547},
}