A CMOS current driver with built-in common-mode signal reduction capability for EIT

Yu Wu, Dai Jiang, Peter J. Langlois, Richard H. Bayford, Andreas Demosthenous. A CMOS current driver with built-in common-mode signal reduction capability for EIT. In 43rd IEEE European Solid State Circuits Conference, ESSCIRC 2017, Leuven, Belgium, September 11-14, 2017. pages 227-230, IEEE, 2017. [doi]

@inproceedings{WuJLBD17,
  title = {A CMOS current driver with built-in common-mode signal reduction capability for EIT},
  author = {Yu Wu and Dai Jiang and Peter J. Langlois and Richard H. Bayford and Andreas Demosthenous},
  year = {2017},
  doi = {10.1109/ESSCIRC.2017.8094567},
  url = {https://doi.org/10.1109/ESSCIRC.2017.8094567},
  researchr = {https://researchr.org/publication/WuJLBD17},
  cites = {0},
  citedby = {0},
  pages = {227-230},
  booktitle = {43rd IEEE European Solid State Circuits Conference, ESSCIRC 2017, Leuven, Belgium, September 11-14, 2017},
  publisher = {IEEE},
  isbn = {978-1-5090-5025-3},
}