Chien-Ming Wu, Ming-Der Shieh, Chien-Hsing Wu, Ming-Hwa Sheu. VLSI architecture of extended in-place path metric update for Viterbi decoders. In International Symposium on Circuits and Systems (ISCAS 2001), 6-9 May 2001, Sydney, Australia. pages 206-209, IEEE, 2001. [doi]
Abstract is missing.