Parallel Balanced-Bit-Serial Design Technique for Ultra-Low-Voltage Circuits With Energy Saving and Area Efficiency Enhancement

Bing-Chen Wu, I-Chyn Wey. Parallel Balanced-Bit-Serial Design Technique for Ultra-Low-Voltage Circuits With Energy Saving and Area Efficiency Enhancement. IEEE Trans. on Circuits and Systems, 65-I(1):141-153, 2018. [doi]

Authors

Bing-Chen Wu

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I-Chyn Wey

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