Reconfigurable Hardware Architecture Design and Implementation for AI Deep Learning Accelerator - researchr publication authors

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Chung-Bin Wu, Ching-Shun Wang, Yu-Kuan Hsiao. Reconfigurable Hardware Architecture Design and Implementation for AI Deep Learning Accelerator. In 9th IEEE Global Conference on Consumer Electronics, GCCE 2020, Kobe, Japan, October 13-16, 2020. pages 154-155, IEEE, 2020. [doi]

This author has not been identified. Look up 'Chung-Bin Wu' in GoogleThis author has not been identified. Look up 'Ching-Shun Wang' in GoogleThis author has not been identified. Look up 'Yu-Kuan Hsiao' in Google

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