Capacitively-Biased Floating-Gate CMOS: a New Logic Family

Richard B. Wunderlich, Brian P. Degnan, Paul E. Hasler. Capacitively-Biased Floating-Gate CMOS: a New Logic Family. In International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA. pages 3728-3731, IEEE, 2007. [doi]

@inproceedings{WunderlichDH07,
  title = {Capacitively-Biased Floating-Gate CMOS: a New Logic Family},
  author = {Richard B. Wunderlich and Brian P. Degnan and Paul E. Hasler},
  year = {2007},
  doi = {10.1109/ISCAS.2007.378653},
  url = {http://doi.ieeecomputersociety.org/10.1109/ISCAS.2007.378653},
  tags = {e-science, logic},
  researchr = {https://researchr.org/publication/WunderlichDH07},
  cites = {0},
  citedby = {0},
  pages = {3728-3731},
  booktitle = {International Symposium on Circuits and Systems (ISCAS 2007), 27-20 May 2007, New Orleans, Louisiana, USA},
  publisher = {IEEE},
}