An FPGA-based accelerator for rapid simulation of SC decoding of polar codes - researchr publication authors

researchr

You are not signed in
Sign in
Sign up

Johannes Wuthrich, Alexios Balatsoukas-Stimming, Andreas Burg. An FPGA-based accelerator for rapid simulation of SC decoding of polar codes. In 2015 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2015, Cairo, Egypt, December 6-9, 2015. pages 633-636, IEEE, 2015. [doi]

This author has not been identified. Look up 'Johannes Wuthrich' in GoogleThis author has not been identified. Look up 'Alexios Balatsoukas-Stimming' in GoogleThis author has not been identified. Look up 'Andreas Burg' in Google

runs on WebDSL