An FPGA-based accelerator for rapid simulation of SC decoding of polar codes

Johannes Wuthrich, Alexios Balatsoukas-Stimming, Andreas Burg. An FPGA-based accelerator for rapid simulation of SC decoding of polar codes. In 2015 IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2015, Cairo, Egypt, December 6-9, 2015. pages 633-636, IEEE, 2015. [doi]

Abstract

Abstract is missing.