Systematic Design Methodology for Optimization of Voltage Comparators in CMOS Technology

João Xavier, Pedro Barquinha, João Goes. Systematic Design Methodology for Optimization of Voltage Comparators in CMOS Technology. In Luis M. Camarinha-Matos, Filipa Ferrada, editors, Technological Innovation for Connected Cyber Physical Spaces - 14th IFIP WG 5.5/SOCOLNET Doctoral Conference on Computing, Electrical and Industrial Systems, DoCEIS 2023, Caparica, Portugal, July 5-7, 2023, Proceedings. Volume 678 of IFIP Advances in Information and Communication Technology, pages 279-289, Springer, 2023. [doi]

Abstract

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