Joe G. Xi, Wayne Wei-Ming Dai. Useful-Skew Clock Routing with Gate Sizing for Low Power Design. VLSI Signal Processing, 16(2-3):163-179, 1997. [doi]
@article{XiD97,
title = {Useful-Skew Clock Routing with Gate Sizing for Low Power Design},
author = {Joe G. Xi and Wayne Wei-Ming Dai},
year = {1997},
doi = {10.1023/A:1007939023899},
url = {http://dx.doi.org/10.1023/A:1007939023899},
tags = {routing, design},
researchr = {https://researchr.org/publication/XiD97},
cites = {0},
citedby = {0},
journal = {VLSI Signal Processing},
volume = {16},
number = {2-3},
pages = {163-179},
}