Gate movement for timing improvement on row based Dual-VDD designs - researchr publication authors

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Hua Xiang, Lakshmi N. Reddy, Haifeng Qian, Ching Zhou, Yu-Shiang Lin, Fanchieh Yee, Andrew Sullivan, Pong-Fei Lu. Gate movement for timing improvement on row based Dual-VDD designs. In 17th International Symposium on Quality Electronic Design, ISQED 2016, Santa Clara, CA, USA, March 15-16, 2016. pages 423-429, IEEE, 2016. [doi]

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