Many-thread aware instruction-level parallelism: architecting shader cores for GPU computing

Ping Xiang, Yi Yang, Mike Mantor, Norm Rubin, Huiyang Zhou. Many-thread aware instruction-level parallelism: architecting shader cores for GPU computing. In Pen-Chung Yew, Sangyeun Cho, Luiz DeRose, David J. Lilja, editors, International Conference on Parallel Architectures and Compilation Techniques, PACT '12, Minneapolis, MN, USA - September 19 - 23, 2012. pages 449-450, ACM, 2012. [doi]

@inproceedings{XiangYMRZ12,
  title = {Many-thread aware instruction-level parallelism: architecting shader cores for GPU computing},
  author = {Ping Xiang and Yi Yang and Mike Mantor and Norm Rubin and Huiyang Zhou},
  year = {2012},
  doi = {10.1145/2370816.2370890},
  url = {http://doi.acm.org/10.1145/2370816.2370890},
  researchr = {https://researchr.org/publication/XiangYMRZ12},
  cites = {0},
  citedby = {0},
  pages = {449-450},
  booktitle = {International Conference on Parallel Architectures and Compilation Techniques, PACT '12, Minneapolis, MN, USA - September 19 - 23, 2012},
  editor = {Pen-Chung Yew and Sangyeun Cho and Luiz DeRose and David J. Lilja},
  publisher = {ACM},
  isbn = {978-1-4503-1182-3},
}