Yuanlong Xiao, André DeHon. HiPR: Fast, Incremental Custom Partial Reconfiguration for HLS Developers. In Michael Adler, Paolo Ienne, editors, FPGA '22: The 2022 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Virtual Event, USA, 27 February 2022 - 1 March 2022. pages 155, ACM, 2022. [doi]
@inproceedings{XiaoD22-0,
title = {HiPR: Fast, Incremental Custom Partial Reconfiguration for HLS Developers},
author = {Yuanlong Xiao and André DeHon},
year = {2022},
doi = {10.1145/3490422.3502335},
url = {https://doi.org/10.1145/3490422.3502335},
researchr = {https://researchr.org/publication/XiaoD22-0},
cites = {0},
citedby = {0},
pages = {155},
booktitle = {FPGA '22: The 2022 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, Virtual Event, USA, 27 February 2022 - 1 March 2022},
editor = {Michael Adler and Paolo Ienne},
publisher = {ACM},
isbn = {978-1-4503-9149-8},
}