Mimi Xie, Chen Pan, Jingtong Hu, Chengmo Yang, Yiran Chen. Checkpoint-aware instruction scheduling for nonvolatile processor with multiple functional units. In The 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015, Chiba, Japan, January 19-22, 2015. pages 316-321, IEEE, 2015. [doi]
@inproceedings{XiePHYC15,
title = {Checkpoint-aware instruction scheduling for nonvolatile processor with multiple functional units},
author = {Mimi Xie and Chen Pan and Jingtong Hu and Chengmo Yang and Yiran Chen},
year = {2015},
doi = {10.1109/ASPDAC.2015.7059024},
url = {http://dx.doi.org/10.1109/ASPDAC.2015.7059024},
researchr = {https://researchr.org/publication/XiePHYC15},
cites = {0},
citedby = {0},
pages = {316-321},
booktitle = {The 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015, Chiba, Japan, January 19-22, 2015},
publisher = {IEEE},
isbn = {978-1-4799-7792-5},
}