DyGA: A Hardware-Efficient Accelerator With Traffic-Aware Dynamic Scheduling for Graph Convolutional Networks

Ruiqi Xie, Jun Yin, Jun Han 0003. DyGA: A Hardware-Efficient Accelerator With Traffic-Aware Dynamic Scheduling for Graph Convolutional Networks. IEEE Trans. Circuits Syst. I Regul. Pap., 68(12):5095-5107, 2021. [doi]

Abstract

Abstract is missing.