Maximizing Energy Efficiency of on-Chip Caches Exploiting Hybrid Memory Structure

Hongjie Xu, Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera. Maximizing Energy Efficiency of on-Chip Caches Exploiting Hybrid Memory Structure. In 28th International Symposium on Power and Timing Modeling, Optimization and Simulation, PATMOS 2018, Platja d'Aro, Spain, July 2-4, 2018. pages 237-242, IEEE, 2018. [doi]

@inproceedings{XuSIO18,
  title = {Maximizing Energy Efficiency of on-Chip Caches Exploiting Hybrid Memory Structure},
  author = {Hongjie Xu and Jun Shiomi and Tohru Ishihara and Hidetoshi Onodera},
  year = {2018},
  doi = {10.1109/PATMOS.2018.8464141},
  url = {https://doi.org/10.1109/PATMOS.2018.8464141},
  researchr = {https://researchr.org/publication/XuSIO18},
  cites = {0},
  citedby = {0},
  pages = {237-242},
  booktitle = {28th International Symposium on Power and Timing Modeling, Optimization and Simulation, PATMOS 2018, Platja d'Aro, Spain, July 2-4, 2018},
  publisher = {IEEE},
  isbn = {978-1-5386-6365-3},
}