A Bin-by-Bin Calibration with Neural Network for FPGA-Based Tapped-Delay-Line Time-to-Digital Converter - researchr publication authors

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Yue Xu, Jie Xie, Zhiwei Xing, Wenqiang Yuan, Guanqun Yu, Zhongmin Zeng, Baoshun Zhang, Dongmin Wu. A Bin-by-Bin Calibration with Neural Network for FPGA-Based Tapped-Delay-Line Time-to-Digital Converter. In IEEE International Conference on Real-time Computing and Robotics, RCAR 2022, Guiyang, China, July 17-22, 2022. pages 681-686, IEEE, 2022. [doi]

This author has not been identified. Look up 'Yue Xu' in GoogleThis author has not been identified. Look up 'Jie Xie' in GoogleThis author has not been identified. Look up 'Zhiwei Xing' in GoogleThis author has not been identified. Look up 'Wenqiang Yuan' in GoogleThis author has not been identified. Look up 'Guanqun Yu' in GoogleThis author has not been identified. Look up 'Zhongmin Zeng' in GoogleThis author has not been identified. Look up 'Baoshun Zhang' in GoogleThis author has not been identified. Look up 'Dongmin Wu' in Google

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