A Bin-by-Bin Calibration with Neural Network for FPGA-Based Tapped-Delay-Line Time-to-Digital Converter

Yue Xu, Jie Xie, Zhiwei Xing, Wenqiang Yuan, Guanqun Yu, Zhongmin Zeng, Baoshun Zhang, Dongmin Wu. A Bin-by-Bin Calibration with Neural Network for FPGA-Based Tapped-Delay-Line Time-to-Digital Converter. In IEEE International Conference on Real-time Computing and Robotics, RCAR 2022, Guiyang, China, July 17-22, 2022. pages 681-686, IEEE, 2022. [doi]

Abstract

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