Zhenyu Xu, Miaoxiang Yu, Yazhe Zhang, Jillian Cai, Qing Yang, Tao Wei. Tile-Level Pipeline for Linear Scalable Stencil Computation on AMD AI Engines. In Andrew Putnam, Jing Li 0073, editors, Proceedings of the 2025 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2025, Monterey, CA, USA, 27 February 2025 - 1 March 2025. pages 172-178, ACM, 2025. [doi]
@inproceedings{XuYZCYW25,
title = {Tile-Level Pipeline for Linear Scalable Stencil Computation on AMD AI Engines},
author = {Zhenyu Xu and Miaoxiang Yu and Yazhe Zhang and Jillian Cai and Qing Yang and Tao Wei},
year = {2025},
doi = {10.1145/3706628.3708822},
url = {https://doi.org/10.1145/3706628.3708822},
researchr = {https://researchr.org/publication/XuYZCYW25},
cites = {0},
citedby = {0},
pages = {172-178},
booktitle = {Proceedings of the 2025 ACM/SIGDA International Symposium on Field Programmable Gate Arrays, FPGA 2025, Monterey, CA, USA, 27 February 2025 - 1 March 2025},
editor = {Andrew Putnam and Jing Li 0073},
publisher = {ACM},
isbn = {979-8-4007-1396-5},
}