High-Level Synthesis Methodologies for Delay-Area Optimized Coarse-Grained Reconfigurable Coprocessor Architectures - researchr publication authors

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Sotirios Xydis, Kiamal Z. Pekmestzi, Dimitrios Soudris, George Economakos. High-Level Synthesis Methodologies for Delay-Area Optimized Coarse-Grained Reconfigurable Coprocessor Architectures. In IEEE Computer Society Annual Symposium on VLSI, ISVLSI 2010, 5-7 July 2010, Lixouri Kefalonia, Greece. pages 486-487, IEEE Computer Society, 2010. [doi]

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