An area-efficient, standard-cell based on-chip NMOS and PMOS performance monitor for process variability compensation

Toshiyuki Yamagishi, Tatsuo Shiozawa, Koji Horisaki, Hiroyuki Hara, Yasuo Unekawa. An area-efficient, standard-cell based on-chip NMOS and PMOS performance monitor for process variability compensation. In Hiroaki Kobayashi, Makoto Ikeda, Fumio Arakawa, editors, 2012 IEEE Symposium on Low-Power and High-Speed Chips, COOL Chips XV, Yokohama, Japan, April 18-20, 2012. pages 1-3, IEEE, 2012. [doi]

Abstract

Abstract is missing.