Kazuya Yamamoto. A 1.8-V operation 5-GHz-band CMOS frequency doubler using current-reuse circuit design technique. J. Solid-State Circuits, 40(6):1288-1295, 2005. [doi]
@article{Yamamoto05-1,
title = {A 1.8-V operation 5-GHz-band CMOS frequency doubler using current-reuse circuit design technique},
author = {Kazuya Yamamoto},
year = {2005},
doi = {10.1109/JSSC.2005.848033},
url = {https://doi.org/10.1109/JSSC.2005.848033},
researchr = {https://researchr.org/publication/Yamamoto05-1},
cites = {0},
citedby = {0},
journal = {J. Solid-State Circuits},
volume = {40},
number = {6},
pages = {1288-1295},
}