Yousuke Yamamoto, Hiroshi Miyanaga, Yoshiji Kobayashi, Yasukazu Terada, Naoaki Yamanaka. A Novel Concept for High-Speed Time Switch Approaching Memory Read Cycle Limit. IEEE Transactions on Communications, 34(9):953-955, 1986. [doi]
@article{YamamotoMKTY86,
title = {A Novel Concept for High-Speed Time Switch Approaching Memory Read Cycle Limit},
author = {Yousuke Yamamoto and Hiroshi Miyanaga and Yoshiji Kobayashi and Yasukazu Terada and Naoaki Yamanaka},
year = {1986},
doi = {10.1109/TCOM.1986.1096640},
url = {http://dx.doi.org/10.1109/TCOM.1986.1096640},
researchr = {https://researchr.org/publication/YamamotoMKTY86},
cites = {0},
citedby = {0},
journal = {IEEE Transactions on Communications},
volume = {34},
number = {9},
pages = {953-955},
}