A Novel Concept for High-Speed Time Switch Approaching Memory Read Cycle Limit

Yousuke Yamamoto, Hiroshi Miyanaga, Yoshiji Kobayashi, Yasukazu Terada, Naoaki Yamanaka. A Novel Concept for High-Speed Time Switch Approaching Memory Read Cycle Limit. IEEE Transactions on Communications, 34(9):953-955, 1986. [doi]

Abstract

Abstract is missing.