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A PND (PMOS-NMOS-Depletion MOS) Type Single Poly Gate Non-Volatile Memory Cell Design with a Differential Cell Architecture in a Pure CMOS Logic Process for a System LSI

Yasue Yamamoto, Masanori Shirahama, Toshiaki Kawasaki, Ryuji Nishihara, Shinichi Sumi, Yasuhiro Agata, Hirohito Kikukawa, Hiroyuki Yamauchi. A PND (PMOS-NMOS-Depletion MOS) Type Single Poly Gate Non-Volatile Memory Cell Design with a Differential Cell Architecture in a Pure CMOS Logic Process for a System LSI. IEICE Transactions, 90-C(5):1129-1137, 2007. [doi]

Authors

Yasue Yamamoto

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Masanori Shirahama

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Toshiaki Kawasaki

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Ryuji Nishihara

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Shinichi Sumi

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Yasuhiro Agata

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Hirohito Kikukawa

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Hiroyuki Yamauchi

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