Akira Yamawaki, Masahiko Iwane. Coherence Maintenances to realize an efficient parallel processing for a Cache Memory with Synchronization on a Chip-Multiprocessor. In 8th International Symposium on Parallel Architectures, Algorithms, and Networks, ISPAN 2005, December 7-9. 2005, Las Vegas, Nevada, USA. pages 324-333, IEEE Computer Society, 2005. [doi]
Abstract is missing.