Thermal via planning for temperature reduction in 3D ICs

Jin-Tai Yan, Yu-Cheng Chang, Zhi-Wei Chen. Thermal via planning for temperature reduction in 3D ICs. In Thomas Büchner, Ramalingam Sridhar, Andrew Marshall, Norbert Schuhmann, editors, Annual IEEE International SoC Conference, SoCC 2010, September 27-29, 2010, Las Vegas, NV, USA, Proceedings. pages 392-395, IEEE, 2010. [doi]

@inproceedings{YanCC10a,
  title = {Thermal via planning for temperature reduction in 3D ICs},
  author = {Jin-Tai Yan and Yu-Cheng Chang and Zhi-Wei Chen},
  year = {2010},
  doi = {10.1109/SOCC.2010.5784703},
  url = {http://dx.doi.org/10.1109/SOCC.2010.5784703},
  researchr = {https://researchr.org/publication/YanCC10a},
  cites = {0},
  citedby = {0},
  pages = {392-395},
  booktitle = {Annual IEEE International SoC Conference, SoCC 2010, September 27-29, 2010, Las Vegas, NV, USA, Proceedings},
  editor = {Thomas Büchner and Ramalingam Sridhar and Andrew Marshall and Norbert Schuhmann},
  publisher = {IEEE},
  isbn = {978-1-4244-6682-5},
}