Floorplan-aware Steiner tree reconstruction for optimal buffer insertion - researchr publication authors

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Jin-Tai Yan, Chia-Fang Lee, Tzu-Ya Wang. Floorplan-aware Steiner tree reconstruction for optimal buffer insertion. In 12th IEEE International Conference on Electronics, Circuits, and Systems, ICECS 2005, Gammarth, Tunisia, December 11-14, 2005. pages 1-4, IEEE, 2005. [doi]

This author has not been identified. Look up 'Jin-Tai Yan' in GoogleThis author has not been identified. Look up 'Chia-Fang Lee' in GoogleThis author has not been identified. Look up 'Tzu-Ya Wang' in Google

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