Rama Muni Reddy Yanamala, Muralidhar Pullakandam. An Efficient Configurable Hardware Accelerator Design for CNN on Low Memory 32-Bit Edge Device. In IEEE International Symposium on Smart Electronic Systems, iSES 2022, Warangal, India, December 18-22, 2022. pages 112-117, IEEE, 2022. [doi]
@inproceedings{YanamalaP22,
title = {An Efficient Configurable Hardware Accelerator Design for CNN on Low Memory 32-Bit Edge Device},
author = {Rama Muni Reddy Yanamala and Muralidhar Pullakandam},
year = {2022},
doi = {10.1109/iSES54909.2022.00033},
url = {https://doi.org/10.1109/iSES54909.2022.00033},
researchr = {https://researchr.org/publication/YanamalaP22},
cites = {0},
citedby = {0},
pages = {112-117},
booktitle = {IEEE International Symposium on Smart Electronic Systems, iSES 2022, Warangal, India, December 18-22, 2022},
publisher = {IEEE},
isbn = {979-8-3503-9922-6},
}