A robust -40 to 120°C all-digital true random number generator in 40nm CMOS

Kaiyuan Yang, David Blaauw, Dennis Sylvester. A robust -40 to 120°C all-digital true random number generator in 40nm CMOS. In Symposium on VLSI Circuits, VLSIC 2015, Kyoto, Japan, June 17-19, 2015. pages 248, IEEE, 2015. [doi]

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