A Systolic Array Based GTD Processor With a Parallel Algorithm

Chia-Hsiang Yang, Chun-Wei Chou, Chia-Shen Hsu, Chiao-En Chen. A Systolic Array Based GTD Processor With a Parallel Algorithm. IEEE Trans. on Circuits and Systems, 62-I(4):1099-1108, 2015. [doi]

@article{YangCHC15,
  title = {A Systolic Array Based GTD Processor With a Parallel Algorithm},
  author = {Chia-Hsiang Yang and Chun-Wei Chou and Chia-Shen Hsu and Chiao-En Chen},
  year = {2015},
  doi = {10.1109/TCSI.2015.2388831},
  url = {http://dx.doi.org/10.1109/TCSI.2015.2388831},
  researchr = {https://researchr.org/publication/YangCHC15},
  cites = {0},
  citedby = {0},
  journal = {IEEE Trans. on Circuits and Systems},
  volume = {62-I},
  number = {4},
  pages = {1099-1108},
}