An Approach to Enhance Loop Performance for Multicluster VLIW DSP Processor

Yangzhao Yang, Naijie Gu, Kaixin Ren, Bingqing Hu. An Approach to Enhance Loop Performance for Multicluster VLIW DSP Processor. In Walter Stechele, Thomas Wild, editors, ARCS 2014 - 27th International Conference on Architecture of Computing Systems, Workshop Proceedings, February 25-28, 2014, Luebeck, Germany, University of Luebeck, Institute of Computer Engineering. pages 1-8, VDE Verlag / IEEE Xplore, 2014. [doi]

@inproceedings{YangGRH14,
  title = {An Approach to Enhance Loop Performance for Multicluster VLIW DSP Processor},
  author = {Yangzhao Yang and Naijie Gu and Kaixin Ren and Bingqing Hu},
  year = {2014},
  url = {http://ieeexplore.ieee.org/xpl/articleDetails.jsp?arnumber=6775074},
  researchr = {https://researchr.org/publication/YangGRH14},
  cites = {0},
  citedby = {0},
  pages = {1-8},
  booktitle = {ARCS 2014 - 27th International Conference on Architecture of Computing Systems, Workshop Proceedings, February 25-28, 2014, Luebeck, Germany, University of Luebeck, Institute of Computer Engineering},
  editor = {Walter Stechele and Thomas Wild},
  publisher = {VDE Verlag / IEEE Xplore},
  isbn = {978-3-8007-3579-2},
}