A 28nm 32Kb embedded 2T2MTJ STT-MRAM macro with 1.3ns read-access time for fast and reliable read applications

Tzu-Hsien Yang, Kai-Xiang Li, Yen-Ning Chiang, Wei-Yu Lin, Huan-Ting Lin, Meng-Fan Chang. A 28nm 32Kb embedded 2T2MTJ STT-MRAM macro with 1.3ns read-access time for fast and reliable read applications. In 2018 IEEE International Solid-State Circuits Conference, ISSCC 2018, San Francisco, CA, USA, February 11-15, 2018. pages 482-484, IEEE, 2018. [doi]

Authors

Tzu-Hsien Yang

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Kai-Xiang Li

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Yen-Ning Chiang

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Wei-Yu Lin

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Huan-Ting Lin

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Meng-Fan Chang

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