Secure scan: a design-for-test architecture for crypto chips

Bo Yang, Kaijie Wu, Ramesh Karri. Secure scan: a design-for-test architecture for crypto chips. In William H. Joyner Jr., Grant Martin, Andrew B. Kahng, editors, Proceedings of the 42nd Design Automation Conference, DAC 2005, San Diego, CA, USA, June 13-17, 2005. pages 135-140, ACM, 2005. [doi]

Abstract

Abstract is missing.