Multistage Latency Adders Architecture Employing Approximate Computing

Xinghua Yang, Yue Xing, Fei Qiao, Huazhong Yang. Multistage Latency Adders Architecture Employing Approximate Computing. Journal of Circuits, Systems, and Computers, 26(3):1-18, 2017. [doi]

Authors

Xinghua Yang

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Yue Xing

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Fei Qiao

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Huazhong Yang

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