Xinghua Yang, Yue Xing, Fei Qiao, Huazhong Yang. Multistage Latency Adders Architecture Employing Approximate Computing. Journal of Circuits, Systems, and Computers, 26(3):1-18, 2017. [doi]
@article{YangXQY17,
title = {Multistage Latency Adders Architecture Employing Approximate Computing},
author = {Xinghua Yang and Yue Xing and Fei Qiao and Huazhong Yang},
year = {2017},
doi = {10.1142/S0218126617500396},
url = {http://dx.doi.org/10.1142/S0218126617500396},
researchr = {https://researchr.org/publication/YangXQY17},
cites = {0},
citedby = {0},
journal = {Journal of Circuits, Systems, and Computers},
volume = {26},
number = {3},
pages = {1-18},
}