Yi Yang, Liqiong Yang, Zhuo Gao. A PVT Tolerant sub-mA PLL in 65nm CMOS process. In 15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008, St. Julien's, Malta, August 31 2008-September 3, 2008. pages 998-1001, IEEE, 2008. [doi]
@inproceedings{YangYG08,
title = {A PVT Tolerant sub-mA PLL in 65nm CMOS process},
author = {Yi Yang and Liqiong Yang and Zhuo Gao},
year = {2008},
doi = {10.1109/ICECS.2008.4675024},
url = {http://dx.doi.org/10.1109/ICECS.2008.4675024},
researchr = {https://researchr.org/publication/YangYG08},
cites = {0},
citedby = {0},
pages = {998-1001},
booktitle = {15th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2008, St. Julien's, Malta, August 31 2008-September 3, 2008},
publisher = {IEEE},
isbn = {978-1-4244-2181-7},
}