ILP-Driven FPGA Multiplier Synthesis: A Scalable Framework for Area-Latency Co-Optimization

Shangshang Yao, Kunlong Li, Li Shen. ILP-Driven FPGA Multiplier Synthesis: A Scalable Framework for Area-Latency Co-Optimization. In IEEE/ACM International Conference On Computer Aided Design, ICCAD 2025, Munich, Germany, October 26-30, 2025. pages 1-9, IEEE, 2025. [doi]

Authors

Shangshang Yao

This author has not been identified. Look up 'Shangshang Yao' in Google

Kunlong Li

This author has not been identified. Look up 'Kunlong Li' in Google

Li Shen

This author has not been identified. Look up 'Li Shen' in Google