Optimizing Memory Access Latencies on a Reconfigurable Multimedia Accelerator: A Case of a Turbo Product Codes Decoder - researchr publication authors

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Samar Yazdani, Thierry Goubier, Bernard Pottier, Catherine Dezan. Optimizing Memory Access Latencies on a Reconfigurable Multimedia Accelerator: A Case of a Turbo Product Codes Decoder. In Jürgen Becker, Roger Woods, Peter M. Athanas, Fearghal Morgan, editors, Reconfigurable Computing: Architectures, Tools and Applications, 5th International Workshop, ARC 2009, Karlsruhe, Germany, March 16-18, 2009. Proceedings. Volume 5453 of Lecture Notes in Computer Science, pages 287-292, Springer, 2009. [doi]

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